Impact of Using the Octagonal Layout for SOI MOSFETs in a High-Temperature Environment
At a Glance
Section titled āAt a Glanceā| Metadata | Details |
|---|---|
| Publication Date | 2015-08-28 |
| Journal | IEEE Transactions on Device and Materials Reliability |
| Authors | Salvador Pinillos Gimenez, Egon Henrique Salerno Galembeck, Christian Renaux, Denis Flandre |
| Institutions | UCLouvain, Centro UniversitƔrio FEI |
| Citations | 15 |
Abstract
Section titled āAbstractāThe impact of high-temperature effects is experimentally investigated in the octagonal layout style for planar silicon-on-insulator (SOI) metal-oxide-semiconductor (MOS) field-effect transistors (MOSFETs), named OCTO SOI MOSFETs (OSMs), in relation to the hexagonal [diamond SOI MOSFETs (DSMs)] and the standard (rectangular conventional SOI MOSFETs) ones regarding the same bias conditions. The devices were manufactured with a 1-Ī¼m fully depleted SOI complementary MOS (CMOS) technology. The main experimental findings demonstrate that OSM is capable of keeping active the longitudinal corner effect and the PArallel connection of MOSFET with Different channel Lengths Effect (PAMDLE) in its structure at high-temperature conditions, and consequently, it maintains its remarkably better electrical performance in comparison with the standard SOI MOSFET, mainly its capacity to reduce the leakage drain current, without causing any extra burden to the current planar SOI CMOS technology in relation to DSMs.
Tech Support
Section titled āTech SupportāOriginal Source
Section titled āOriginal SourceāReferences
Section titled āReferencesā- 2011 - FISH SOI MOSFET: Modeling, characterization and its application to improve the performance of analog ICs [Crossref]
- 0 - High-temperature mixed-signal ICs using silicon carbide CMOS technology