Diamond Superjunction (SJ) Process Development - Super-Lattice Power Amplifier with Diamond Enhanced Superjunction (SPADES)
At a Glance
Section titled āAt a Glanceā| Metadata | Details |
|---|---|
| Publication Date | 2019-11-01 |
| Authors | Shamima Afroz, Brian Novak, Ken A. Nagamatsu, Kevin Frey, Patrick B. Shea |
| Institutions | United States Naval Research Laboratory, Northrop Grumman (United States) |
| Citations | 3 |
Abstract
Section titled āAbstractāThe Super-Lattice Power Amplifier with Diamond Enhanced Superjunction (SPADES) device is being developed to enable a 2x increase in breakdown voltage of a Super-Lattice Castellated Field Effect Transistor (SLCFET) device. Incorporation of a diamond superjunction (SJ) within the drain region of a SLCFET was previously predicted to improve breakdown voltage with minimal impact on performance. P-type doped nanocrystalline diamond (NCD) is grown within etched trenches in the drain region of a SLCFET and tied to the gate, forming an active vertical field plate to laterally distribute electric field. Under high drain bias, mutual depletion regions are formed in the current carrying ridges and NCD in the drain region. This results in lower parasitic capacitance compared to a metal field plate, an important consideration for millimeter wave applications. On devices with an NCD SJ, we observe minimal capacitance penalty, low dispersion, and breakdown voltage behavior consistent with TCAD model prediction.
Tech Support
Section titled āTech SupportāOriginal Source
Section titled āOriginal SourceāReferences
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- 2019 - Superlattice Power Amplifier with Diamond Enhanced Superjunction (SPADES)