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6CCVD Research

Noncured Graphene Thermal Interface Materials for High-Power Electronics - Minimizing the Thermal Contact Resistance

At a Glance

Section titled “At a Glance”
MetadataDetails
Publication Date2021-06-28
JournalNanomaterials
AuthorsSriharsha Sudhindra, Fariborz Kargar, Alexander A. Balandin
InstitutionsUniversity of California, Riverside
Citations35
AnalysisFull AI Review Included

Executive Summary

Section titled “Executive Summary”
  • Core Achievement: Developed and characterized non-curing graphene Thermal Interface Materials (TIMs) optimized for minimizing thermal contact resistance (RC) in high-power electronics applications.
  • Optimal Loading: The thermal contact resistance (RC) exhibits an unexpected non-monotonic dependence on filler loading (Ο), achieving its minimum value at approximately 15 wt% graphene concentration.
  • Thermal Performance: Bulk thermal conductivity (KTIM) was significantly enhanced, increasing up to 24x (at 40 wt% loading) compared to the pure silicone oil base (0.18 W/mK).
  • Roughness Sensitivity: Increasing the surface roughness (Sq) by just 1 ”m results in an approximate doubling (2x increase) of the thermal contact resistance (RC).
  • Design Implications: The results provide critical data for optimizing graphene TIM composition (loading and BLT) based on the specific roughness characteristics of the adjoining surfaces, particularly for systems utilizing diamond or wide-band-gap semiconductors.
  • Scalability: The total thermal resistance (Rtot) scales linearly with Bond Line Thickness (BLT) across the studied range (5 to 35 ”m), confirming the viability of these TIMs for micrometer-scale packaging requirements.

Technical Specifications

Section titled “Technical Specifications”
ParameterValueUnitContext
Base Material KTIM0.18W/mKPure silicone oil base (reference)
Maximum KTIM (Measured)~4.2W/mKAchieved at 40 wt% graphene loading
KTIM Enhancement (Max)24xFactorCompared to silicone oil base
Optimal Graphene Loading (Ο)~15wt%Minimum thermal contact resistance (RC)
Applied Pressure (P)0.55MPaStandard test condition (~80 psi)
Test Temperature80°CStandard test condition
Bond Line Thickness (BLT) Range5 to 35”mRange studied for Rtot linearity
Copper Plate Thickness1.09mmSubstrate used for roughness testing
Graphene Filler Lateral Dimension~25”mVendor specified average (xGNP H-25)
Reference Roughness (Sq)0.05”mSmoothest copper plate tested
Maximum Roughness (Sq)3.1”mRoughest copper plate tested
RC Increase due to Roughness~2xFactorObserved when Sq increases by ~1 ”m
Rtot (30 wt%, Sq=3.1 ”m, BLT=300 ”m)~2Kcm2W-1Example of roughness compensation

Key Methodologies

Section titled “Key Methodologies”

  1. Material Synthesis (Non-Curing TIM):

    • Fillers: Commercial FLG flakes (xGNP H-25) were used.
    • Dispersion: Acetone solvent was added to the fillers to prevent agglomeration during mixing.
    • Matrix: Fillers were introduced into a silicone oil (PDMS) base polymer.
    • Mixing: High-speed shear mixing was performed at 300 rpm for 20 minutes to ensure homogeneous dispersion.
    • Solvent Removal: Acetone was evaporated in an oven at ~70 °C for 2 hours, resulting in the final non-curing TIM.

  2. Surface Preparation and Characterization:

    • Substrates: 1 in x 1 in copper plates (1.09 mm thick) were used.
    • Roughness Control: Plates were polished using 180 grit silicon carbide paper discs for varying durations (~1 to ~3.5 min) to achieve controlled RMS roughness (Sq).
    • Roughness Measurement: A 3D optical profilometer utilizing white-light interferometry (WLI) and a 50x Nikon Mirau objective lens was used to quantify Sq (ranging from 0.05 ”m to 3.1 ”m).

  3. Thermal Characterization (ASTM D5470-06):

    • Equipment: Industrial TIM tester (LongWin Science and Technology Corp) utilizing the steady-state method.
    • Conditions: All tests were conducted under a constant applied pressure of 0.55 MPa (~80 psi) and a temperature of 80 °C.
    • Bulk KTIM and RC Extraction: TIMs were tested between the flat steel plates of the tester using plastic shims to control BLT. KTIM was derived from the slope of the linear Rtot vs. BLT plot, and the total contact resistance (2RC) was derived from the y-intercept.
    • Roughness Testing: TIMs (15 wt% and 30 wt% loading) were sandwiched between the specially prepared copper plates. Silicone oil was applied at the steel-copper interfaces to minimize external contact resistance, isolating the effect of the copper plate roughness on the TIM layer RC.

Commercial Applications

Section titled “Commercial Applications”

The optimized non-curing graphene TIMs are highly relevant for thermal management in sectors requiring high reliability and efficient heat dissipation, especially where interface roughness is a challenge.

  • High-Power Density Electronics: General application in devices where heat flux is extremely high, requiring minimal total thermal resistance (Rtot).
  • Wide-Band-Gap (WBG) Devices: Essential for thermal management of GaN and SiC power transistors and modules, which operate at high temperatures and power levels.
  • Diamond-Based Electronics: Critical for packaging diamond substrates, which offer superior intrinsic thermal conductivity but often present large surface roughness (due to grain structure) that significantly increases RC.
  • Power Modules and Inverters: Used between Direct Bond Copper (DBC) layers and heat sinks in applications like electric vehicles and industrial power supplies.
  • Data Centers and Microprocessors: Applicable in high-performance computing where minimizing Rtot is necessary for maintaining device reliability and preventing exponential failure rates.
  • Concentrated Photovoltaics (CPV): Used for thermal management of multi-junction solar cells operating under high solar concentration.
View Original Abstract

We report on experimental investigation of thermal contact resistance, RC, of the noncuring graphene thermal interface materials with the surfaces characterized by different degree of roughness, Sq. It is found that the thermal contact resistance depends on the graphene loading, Ο, non-monotonically, achieving its minimum at the loading fraction of Ο 15 wt%. Decreasing the surface roughness by Sq1 ÎŒm results in approximately the factor of ×2 decrease in the thermal contact resistance for this graphene loading. The obtained dependences of the thermal conductivity, KTIM, thermal contact resistance, RC, and the total thermal resistance of the thermal interface material layer on Ο and Sq can be utilized for optimization of the loading fraction of graphene for specific materials and roughness of the connecting surfaces. Our results are important for the thermal management of high-power-density electronics implemented with diamond and other wide-band-gap semiconductors.

Tech Support

Section titled “Tech Support”

Original Source

Section titled “Original Source”

References

Section titled “References”
  1. 2011 - Multigate Transistors as the Future of Classical Metal-Oxide-Semiconductor Field-Effect Transistors [Crossref]
  2. 2005 - Managing Heat for Electronics [Crossref]
  3. 2006 - Silicon CMOS Devices Beyond Scaling [Crossref]
  4. 2015 - Nanothermal Interface Materials: Technology Review and Recent Results [Crossref]
  5. 2012 - Graphene Quilts for Thermal Management of High-Power GaN Transistors [Crossref]
  6. 2021 - Applications and Impacts of Nanoscale Thermal Transport in Electronics Packaging [Crossref]
  7. 2009 - GaN-on-Diamond Substrates for HEMT Applications

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