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6CCVD Research

Inversion-type p-channel diamond MOSFET issues

At a Glance

Section titled “At a Glance”
MetadataDetails
Publication Date2021-08-04
JournalJournal of materials research/Pratt’s guide to venture capital sources
AuthorsXufang Zhang, Tsubasa Matsumoto, Satoshi Yamasaki, Christoph E. Nebel, Takao Inokuma
InstitutionsKanazawa University
Citations28
AnalysisFull AI Review Included

Inversion-type p-channel Diamond MOSFET Issues: Technical Review

Section titled “Inversion-type p-channel Diamond MOSFET Issues: Technical Review”

This analysis summarizes the development and characterization of inversion-type p-channel diamond Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs), focusing on interface quality challenges for high-power applications.

Executive Summary

Section titled “Executive Summary”
  • Core Achievement: Successful fabrication of the world’s first inversion-channel p-type diamond MOSFETs on both homoepitaxial (HPHT) and heteroepitaxial (Ir/Si) substrates, demonstrating normally-off operation.
  • Primary Limitation: Device performance is severely limited by low field-effect mobility (”FE), with typical values around 8.0 cm2V-1s-1 (best case 20 cm2V-1s-1).
  • Root Cause: The low ”FE is directly attributed to extremely high interface state density (Dit), typically in the range of 4-9 x 1012 cm-2eV-1.
  • Doping Dependence: An inverse correlation was established between maximum ”FE and Dit, where Dit increases as the phosphorus doping concentration (Np) of the n-type body decreases.
  • Interface Improvement: A novel OH-termination technique using H-diamond followed by wet annealing was developed, resulting in improved interface quality (Dit reduced to 0.4-1.5 x 1012 cm-2eV-1) compared to the previous O-diamond method.
  • Trap Characterization: Conductance method analysis identified the interface traps as donor-like traps and provided precise parameters, including a hole capture cross section (σp) on the order of 10-17 cm2.
  • Future Goal: Achieving commercial-grade mobility (”FE > 1000 cm2V-1s-1) requires reducing Dit below 1011 cm-2eV-1 and implementing techniques like lateral overgrowth to achieve atomically flat surfaces.

Technical Specifications

Section titled “Technical Specifications”
ParameterValueUnitContext
Diamond Bandgap5.5eVUltimate material property
Breakdown Electric Field> 10MV/cmUltimate material property
Bulk Hole Mobility5300cm2V-1s-1Ultimate material property
Thermal Conductivity2200W/mKUltimate material property
Max Ids Density (Homo)-1.6mA/mmTypical HPHT MOSFET
Max ”FE (Homo, Typical)8.0cm2V-1s-1L=5 ”m, W=150 ”m
Max ”FE (Homo, Best Case)20cm2V-1s-1Np = 2 x 1015 cm-3
Max ”FE (Heteroepitaxial)2.7cm2V-1s-1L=15 ”m, W=150 ”m
Subthreshold Swing (S) (Homo)380mV/decTypical HPHT MOSFET
Dit (O-diamond, High-Low C-V)4-9 x 1012cm-2eV-1OH-termination on O-diamond
Dit (H-diamond, High-Low C-V)0.4-1.5 x 1012cm-2eV-1OH-termination on H-diamond (Improved)
Target Dit for High ”FE< 1011cm-2eV-1Required to achieve ”FE > 1000 cm2V-1s-1
Hole Capture Cross Section (σp)~10-17cm2Extracted via conductance method
RMS Roughness (HPHT)< 1nmScanning area 500 nm x 500 nm
RMS Roughness (Hetero)2.2 to 13.8nmScanning area 500 nm x 500 nm
Gate Oxide Thickness (Al2O3)34nmDeposited by ALD
ALD Deposition Temperature300°CAl2O3 layer growth

Key Methodologies

Section titled “Key Methodologies”

The fabrication process involved MPCVD for diamond growth, followed by specialized surface termination and ALD for gate oxide deposition.

  1. Substrate Preparation:

    • Homoepitaxial: HPHT synthetic Ib (111) semi-insulating single-crystal diamond.
    • Heteroepitaxial: Ir/intermediate layer/Si (111) substrate, followed by DC plasma CVD growth and mechanical polishing to form a freestanding diamond substrate (104 ”m thick).

  2. Diamond Layer Deposition (MPCVD):

    • N-type Body: Phosphorus-doped (Np ~ 1 x 1017 cm-3). Parameters: 0.4% CH4, 3.6 kW plasma, 150 Torr, ~10 ”m thickness.
    • P+-layer (Source/Drain): Boron-doped (~1 x 1020 cm-3). Parameters: 0.2% CH4, 1200 W plasma, 50 Torr, ~50 nm thickness.

  3. OH-Termination (Novel H-diamond Method):

    • Step 1 (H-termination): H-plasma treatment (900 °C, 800 W, 225 Torr, 10 min).
    • Step 2 (Wet Annealing): Water vapor annealing (N2 carrier gas bubbled through de-ionized water) at 500 °C for 60 min in an electric furnace.

  4. Gate Oxide and Metallization:

    • Gate Oxide: 34 nm thick Al2O3 deposited by Atomic Layer Deposition (ALD) at 300 °C.
    • Electrodes: Ti/Pt/Au evaporated to form gate, drain, and source contacts.

  5. Interface Characterization:

    • High-Low C-V Method: Used to calculate Dit by comparing capacitance at low (10 Hz) and high (10 kHz) frequencies.
    • Conductance Method: Applied at high temperatures (up to 400 K) and wide frequency ranges (1 Hz to 10 MHz) to gain deeper insights into trap properties, including time constants (τit) and capture cross sections (σp), while accounting for surface potential fluctuation (SPF).
    • Structural Analysis: TEM (Al2O3/diamond interface) and AFM (surface roughness).

Commercial Applications

Section titled “Commercial Applications”

Diamond MOSFET technology is critical for next-generation power electronics due to diamond’s extreme material properties.

Application AreaSpecific Product/BenefitTechnical Relevance
High-Power SwitchingHigh-efficiency power converters, inverters, and motor drives.Diamond’s high breakdown field (> 10 MV/cm) and wide bandgap (5.5 eV) enable operation at higher voltages and frequencies than SiC or GaN.
Normally-Off DevicesSafe and reliable power switching devices.Inversion-type MOSFETs allow for modulation of the threshold voltage (VT) via doping, ensuring normally-off operation, which is crucial for safety in power systems.
High-Density ElectronicsCompact power modules and heat sinks.Diamond’s exceptional thermal conductivity (2200 W/mK) allows for efficient heat dissipation, enabling higher power density in integrated circuits.
Cost-Effective ProductionLarge-scale commercialization of diamond devices.The successful development of heteroepitaxial MOSFETs on Si substrates addresses the size limitations and high cost of traditional HPHT diamond substrates.
Advanced Device ArchitecturesVertical and Trench-type MOSFETs.The detailed understanding of the Al2O3/diamond interface traps (Dit, σp) is essential for designing and passivating complex 3D structures for enhanced current handling.
View Original Abstract

Abstract This article reviews the state of the art in inversion-type p-channel diamond MOSFETs. We successfully developed the world’s first inversion-channel homoepitaxial and heteroepitaxial diamond MOSFETs. We investigated the dependence of phosphorus concentration ( N P ) of the n-type body on field-effect mobility ( ÎŒ FE ) and interface state density ( D it ) for the inversion channel homoepitaxial diamond MOSFETs. With regard to the electrical properties of both the homoepitaxial and heteroepitaxial diamond MOSFETs, they suffer from low ÎŒ FE and one main reason is high D it . To improve the interface quality, we proposed a novel technique to form OH-termination by using H-diamond followed by wet annealing, instead of the previous OH-termination formed on O-diamond. We made precise interface characterization for diamond MOS capacitors by using the high-low C-V method and the conductance method, providing further insights into the trap properties at Al 2 O 3 /diamond interface, which would be beneficial for performance enhancement of the inversion-type p-channel diamond MOSFETs. Graphic abstract

Tech Support

Section titled “Tech Support”

Original Source

Section titled “Original Source”

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