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6CCVD Research

Circuitry of Micro-Power JFET and CMOS Input Differential Stages for Op-Amps on Silicon and Wide-Band Semiconductors

At a Glance

Section titled ā€œAt a Glanceā€
MetadataDetails
Publication Date2022-11-17
AuthorsVladislav Chumakov, Nikolay N. Prokopenko, Alexey E. Titov
InstitutionsDon State Technical University, Institute of Service and Entrepreneurship of DGTU

Abstract

Section titled ā€œAbstractā€

The study presents an analysis of universal JFET and CMOS differential stages (DS) circuits. Such cascades provide a smaller range of transistor currents (10-100 $\mu$A) compared to classical cascades. The described DSs are implemented on combined process technologies, and therefore can be designed on JFET, BJT or CMOS chips. In addition, gallium arsenide, diamond gallium nitride, thin-film TFT and silicon carbide transistors. A computer simulation of the static modes of the developed DSs and their current dependences is presented. The results of GaAs DS modeling and its frequency dependence are presented.

Tech Support

Section titled ā€œTech Supportā€

Original Source

Section titled ā€œOriginal Sourceā€

References

Section titled ā€œReferencesā€
  1. 2019 - An innovative strategy to reduce die area of robust OTA by using iMTGSPICE and diamond layout style for MOSFETs

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