Thermal Boundary Resistance Reduction by Interfacial Nanopatterning for GaN-on-Diamond Electronics Applications
At a Glance
Section titled âAt a Glanceâ| Metadata | Details |
|---|---|
| Publication Date | 2025-03-27 |
| Journal | ACS Applied Electronic Materials |
| Authors | Xiaoyang Ji, Sai Charan Vanjari, Daniel Francis, Jerome A. Cuenca, Arpit Nandi |
| Institutions | University of Bristol, Cardiff University |
| Citations | 1 |
| Analysis | Full AI Review Included |
Executive Summary
Section titled âExecutive SummaryâThis analysis focuses on optimizing the thermal interface between Gallium Nitride (GaN) and Diamond substrates to improve heat dissipation in High Electron Mobility Transistors (HEMTs).
- Core Achievement: Demonstrated a 2.6X reduction in the effective Thermal Boundary Resistance (TBReff) of the GaN/Diamond interface using nanoscale patterning and high-temperature annealing.
- Annealing Benefit: Rapid thermal annealing (RTA) of the SiN dielectric interlayer at 800 °C reduced the SiN TBReff by a factor of 2, attributed to SiN densification and improved stoichiometry.
- Nanopatterning Efficacy: Interfacial patterning with a 200 nm pitch reduced the overall Diamond/GaN TBReff from 101 m2K/GW (planar) to 39 m2K/GW.
- Mechanism: The TBReff reduction scales approximately inversely with the normalized interface contact area, which was nominally increased up to 4-fold by the trench structure.
- Structural Integrity: Finite element analysis confirmed that the maximum principal stress induced in the GaN corners (368-387 MPa) by the thermal mismatch is well below the tensile strength of nanostructured GaN (4-7 GPa), ensuring mechanical reliability.
- Measurement Technique: Thermal properties were rigorously assessed using nanosecond Transient Thermoreflectance (ns-TTR), confirming the enhanced heat transport across the heterogeneous interface.
Technical Specifications
Section titled âTechnical Specificationsâ| Parameter | Value | Unit | Context |
|---|---|---|---|
| Planar GaN/Diamond TBReff | 101 | m2K/GW | Unpatterned interface, 1000 °C annealed SiN. |
| Lowest Nanopatterned TBReff | 39 | m2K/GW | 200 nm pitch, 4-fold nominal contact area increase. |
| TBReff Reduction Factor | 2.6X | Factor | Achieved via nanopatterning (200 nm pitch). |
| SiN Interlayer Thickness | 8 to 22 | nm | Tested range for TBReff dependence. |
| SiN TBReff (As-deposited) | 51 | m2K/GW | 22 nm film, deposited at 300 °C. |
| SiN TBReff (Annealed) | 25 | m2K/GW | 22 nm film, 800 °C RTA (2X reduction). |
| SiN Thermal Conductivity | ~1.2 | W/mK | Averaged value for 800 °C annealed films. |
| Trench Pitch Widths Tested | 800 down to 200 | nm | Range of patterned structures. |
| Ideal Contact Area Increase (200 nm pitch) | 4.0X | Factor | Normalized to planar interface (assuming 300 nm depth). |
| Actual Trench Depth (200 nm pitch sample) | 320 | nm | Measured via TEM. |
| Maximum Principal Stress (GaN corners) | 368 | MPa | Simulated for 50% diamond-filled trenches. |
| GaN Tensile Strength | 4-7 | GPa | Literature value for nanostructured GaN. |
| Diamond Film Thickness | 1 | ”m | Deposited via MPCVD for thermal measurement. |
Key Methodologies
Section titled âKey Methodologiesâ-
SiN Interlayer Deposition and Densification:
- SiN films (†25 nm thick) were deposited onto GaN/diamond wafers using Plasma-Enhanced Chemical Vapor Deposition (PECVD) at 300 °C.
- Samples underwent Rapid Thermal Annealing (RTA) at 600 °C, 800 °C, or 1000 °C for 10 minutes under a N2 atmosphere to densify the SiN and reduce its intrinsic TBR.
-
GaN Nanopatterning (Trench Fabrication):
- A hard mask (SiN, ~50 nm) was deposited, followed by a PMMA layer.
- E-beam lithography was used to pattern trenches into the PMMA.
- Trench patterns were transferred into the SiN mask using Reactive Ion Etching (RIE) with SF6 plasma.
- The underlying GaN layer was etched using RIE with Cl2/Ar plasma. Trench width was fixed at 100 nm; pitch widths ranged from 800 nm down to 200 nm.
-
Diamond Growth (MPCVD):
- A 10 nm PECVD SiN layer was conformally deposited and annealed at 1000 °C.
- The sample was immersed in a nano-diamond colloid solution for seeding (positive zeta-potential particles).
- Diamond thin films (1 ”m) were grown using Microwave Plasma-Assisted Chemical Vapor Deposition (MPCVD) at ~700 °C.
- MPCVD parameters: 5 kW power, 160 mbar pressure, 3% CH4/H2 gas flow, 1 hour duration.
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Thermal Characterization (ns-TTR):
- A transducer stack (10 nm Cr adhesion layer, 160 nm Au layer) was thermally evaporated onto the samples.
- Nanosecond Transient Thermoreflectance (ns-TTR) was used to measure the TBReff.
- A 532 nm pulsed pump laser heated the transducer; a 488 nm CW probe laser measured the thermoreflectance signal decay.
- Data fitting utilized an axisymmetric multilayer heat diffusion model to extract thermal properties.
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Structural and Stress Analysis:
- Cross-sectional microstructure was analyzed using Transmission Electron Microscopy (TEM) and Energy-Dispersive Spectroscopy (EDS) mapping to confirm SiN conformality and diamond filling (which showed voids).
- Steady-state Finite Element Analysis (FEA) using Ansys simulated heat flux and thermo-mechanical stress (maximum principal stress) to evaluate fracture risk under thermal loading.
Commercial Applications
Section titled âCommercial ApplicationsâThe reduction of thermal boundary resistance in GaN-on-Diamond structures is critical for maintaining performance and lifetime in high-power semiconductor devices.
- High-Power Radio Frequency (RF) Electronics: Enabling GaN High Electron Mobility Transistors (HEMTs) to operate at maximum areal power density without thermal derating, crucial for military and commercial RF applications.
- 5G/6G Wireless Infrastructure: Improving the efficiency and reliability of base station amplifiers and high-frequency components where heat flux is extremely high.
- Satellite Communications: Providing robust thermal management for space-based GaN electronics, where passive cooling solutions are essential.
- Electric Vehicles (EVs) and Power Conversion: Enhancing the performance and lifespan of GaN-based power converters and inverters by ensuring efficient heat extraction.
- Emerging GaN Architectures: Applicable to advanced device structures like GaN FinFETs, where localized self-heating is a major challenge.
View Original Abstract
GaN high electron mobility transistors (HEMTs) on SiC substrates are the highest performing commercially available transistors for high-power, high-frequency applications. However, Joule self-heating limits the maximum areal power density, i.e., operating power is derated to ensure the lifetime of GaN-based devices. Diamond is attractive as a heat sink due to its record-high thermal conductivity combined with its high electrical resistivity. GaN-on-diamond devices have been demonstrated, bringing the diamond as close as possible to the active device area. The GaN/diamond interface, close to the channel heat source, needs to efficiently conduct high heat fluxes, but it can present a significant thermal boundary resistance (TBR). In this work, we implement nanoscale trenches between GaN and diamond to explore new strategies for reducing the effective GaN/diamond TBR (TBR<sub>eff</sub>). A 3Ă reduction in GaN/diamond TBR<sub>eff</sub> was achieved using this approach, which is consistent with the increased contact area; thermal properties were measured using nanosecond transient thermoreflectance (ns-TTR). In addition, the SiN <sub><i>x</i></sub> dielectric interlayer between the GaN and diamond increased its thermal conductivity by 2Ă through annealing, further reducing the TBR. This work demonstrates that the thermal resistance of heterogeneous interfaces can be optimized by nanostructured patterning and high-temperature annealing, which paves the way for enhanced thermal management in future device applications.