Improving MOSFETs’ TID Tolerance Through Diamond Layout Style
At a Glance
Section titled “At a Glance”| Metadata | Details |
|---|---|
| Publication Date | 2017-06-26 |
| Journal | IEEE Transactions on Device and Materials Reliability |
| Authors | L. E. Seixas, Odair Lélis Gonçalez, Rafael Navarenho de Souza, Saulo Finco, Rafael G. Vaz |
| Institutions | Centro de Tecnologia da Informação Renato Archer, Centro Universitário FEI |
| Citations | 18 |
Abstract
Section titled “Abstract”This letter describes an experimental comparative study of the total ionizing dose (TID) effects due to Co-60 gamma irradiation between hexagonal (Diamond) and conventional rectangular gates metal-oxide semiconductor field-effect transistors (MOSFETs), regarding the same bias conditions during irradiation. The transistors were manufactured by using the 350 nm commercial bulk complementary metal-oxide semiconductor (CMOS) integrated-circuits (ICs) technology. The innovative hexagonal gate layout proposal can reduce the parameter deviations of TID effects in MOSFETs in, approximately, 30%, 400%, and 100% in terms of the threshold voltage, leakage drain current, and subthreshold slope, respectively, regarding the standard MOSFET counterparts. Therefore, the Diamond MOSFET can be considered as a low-cost alternative device to be used in space CMOS ICs applications.