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6CCVD Research

Influence of Different Surface Morphologies on the Performance of High-Voltage, Low-Resistance Diamond Schottky Diodes

At a Glance

Section titled ā€œAt a Glanceā€
MetadataDetails
Publication Date2020-05-07
JournalIEEE Transactions on Electron Devices
AuthorsPhilipp Reinke, Fouad Benkhelifa, Lutz Kirste, Heiko Czap, Lucas Pinti
InstitutionsFraunhofer Institute for Applied Solid State Physics, Sonova (Switzerland)
Citations19
AnalysisFull AI Review Included

Executive Summary

Section titled ā€œExecutive Summaryā€

This study investigates the influence of surface morphology (smooth, hillock-rich, polished) on the performance of high-voltage vertical diamond Schottky Barrier Diodes (SBDs).

  • Performance Benchmark: All tested SBDs achieved high blocking voltages (VBD > 2.4 kV) and low specific on-resistances (RonA < 440 mĪ©Ā·cm2).
  • Optimal Morphology: The polished sample (S3) achieved the best overall metrics, including the lowest RonA (300 mĪ©Ā·cm2) and the highest Baliga Figure of Merit (BFOM = 21 MW/cm2).
  • BFOM Improvement: All three diode types demonstrated an approximate 7-fold increase in BFOM compared to similar high-voltage diamond diodes reported in prior literature (Twitchen et al. [10]).
  • Surface Impact on Breakdown: The smooth (S2) and polished (S3) diodes maintained very low leakage current (JRev < 10-4 A/cm2 up to 2.2 kV). However, the rough, hillock-rich sample (S1) showed a 30% reduction in calculated 1D breakdown field (EMax ā‰ˆ 1.2 MV/cm), attributed to local field enhancement from surface inhomogeneity.
  • Defect Limitation: Statistical analysis confirmed that high defect density in the substrate (S3) significantly limits the feasible device area and increases reverse current density, underscoring the necessity of high-quality substrates.
  • Modeling Advancement: The current transport in the dual-barrier hillock-rich diode (S1) was accurately modeled using the Lambert W-function, providing high-accuracy parameter extraction.

Technical Specifications

Section titled ā€œTechnical Specificationsā€
ParameterValueUnitContext
Theoretical Dielectric Strength10MV/cmDiamond material limit
Thermal Conductivity2000W/(mĀ·K)Diamond material property
Hole Mobility (Max)3800cm2/(VĀ·s)Diamond material property
i-Layer Doping (NA - ND)2.0 to 6.8 x 1014cm-3Unintentionally doped epitaxial layer
Substrate Doping (NA)ā‰ˆ 2 x 1020cm-3Highly boron doped HPHT substrate
Ohmic Contact Resistivity1 x 10-5Ī©Ā·cm2TiPtAu stack after RTA
Maximum Blocking Voltage (S3)2.6kVPolished sample (highest VBD)
Specific On-Resistance (S3)300mĪ©Ā·cm2Polished sample (lowest RonA)
Baliga Figure of Merit (S3)21MW/cm2Polished sample (highest BFOM)
Maximum Electric Field (S2)1.6MV/cmSmooth sample (highest EMax)
Reverse Current Density (S2, S3)< 10-4A/cm2Up to 2.2 kV reverse bias
Schottky Barrier Height (S3, CV)1.80 Ā± 0.05eVPolished sample (highest barrier)
Ideality Factor (S2)1.03-Smooth sample (nearly ideal TEM)
Punch Through Factor (S2, S3)ā‰ˆ 0.2-Close to optimal value (Ī· ā‰ˆ 0.7)

Key Methodologies

Section titled ā€œKey Methodologiesā€

The vertical diamond Schottky diodes were fabricated using Microwave Plasma-Enhanced Chemical Vapor Deposition (MWPECVD) on highly boron-doped HPHT substrates.

  1. Substrate Preparation:

    • Acid cleaning: 3:1 mixture of sulfuric acid and nitric acid at 250 Ā°C for 90 minutes.
    • H2 plasma etch: Conducted for 5 to 40 minutes immediately prior to growth to minimize polishing damage.

  2. Epitaxial Growth (i-Layer):

    • System: Home-made MWPECVD system.
    • Temperature/Pressure: Substrate temperature stabilized at roughly 800 Ā°C; process pressure at 200 mbar.
    • Gas Mixture: CH4/H2 ratio varied (4% for S1, 3% for S2/S3) with 0.15% O2/H2 addition.
    • Thickness: i-layers ranged from 17 Āµm (S2) to 28 Āµm (S1).

  3. Surface Modification (S3 Polishing):

    • Mechanical Polishing: Top surface of S3 was polished on an iron plate to remove approximately 3 Āµm of material and flatten hillocks.
    • Post-Polish Etch: 10 minutes in a 2.2 kW H2 plasma at 800 Ā°C to reduce subsurface polishing damage.

  4. Ohmic Contact Fabrication (Backside):

    • Deposition: TiPtAu stack deposited via electron-beam evaporation.
    • Annealing: Rapid Thermal Annealing (RTA) in N2 atmosphere for 60 seconds at 850 Ā°C.

  5. Schottky Contact Fabrication (Frontside):

    • Surface Termination: Short oxygen plasma ashing used to enhance oxygen termination.
    • Metallization: Electron-beam evaporated Ti (Schottky metal), Pt (diffusion stop), and Au (capping layer).
    • Device Geometry: Diodes fabricated with diameters of 100, 200, and 300 Āµm.

Commercial Applications

Section titled ā€œCommercial Applicationsā€

The development of high-voltage, low-resistance diamond SBDs directly addresses critical needs in high-performance power electronics, leveraging diamondā€™s superior material properties.

  • Power Conversion Systems: Direct application in high-efficiency power converters, demonstrated recently in a non-isolated buck converter [11].
  • High-Voltage Switching: Suitable for applications requiring high breakdown voltages (VBD > 2 kV), such as industrial motor drives, grid infrastructure, and electric vehicle charging stations.
  • High-Frequency/High-Temperature Operation: Diamondā€™s high thermal conductivity (2000 W/mK) and wide bandgap allow these devices to operate reliably at higher temperatures and switching frequencies than Si or SiC devices, minimizing switching losses and heat dissipation.
  • Aerospace and Defense: Use in compact, radiation-hardened power modules where high power density and reliability under extreme conditions are mandatory.
  • Energy Efficiency: The low specific on-resistance (RonA) reduces conduction losses, leading to higher overall system efficiency in power management circuits.
View Original Abstract

Vertical diamond Schottky diodes with blocking voltages VBD > 2.4 kV and ON-resistances RON <; 400 mĪ©cm2 were fabricated on homoepitaxially grown diamond layers with different surface morphologies. The morphology (smooth as-grown, hillock-rich, polished) influences the Schottky barrier, the carrier transport properties, and ultimately the device performance. The smooth as-grown sample exhibited a low reverse current density JRev <; 10-4 A/cm2 for reverse voltages up to 2.2 kV. The hillock-rich sample blocked similar voltages with a slight increase in the reverse current density (JRev <; 10-3 A/cm2). The calculated 1-D breakdown field, however, was reduced by 30%, indicating a field enhancement induced by the inhomogeneous surface. The polished sample demonstrated a similar breakdown voltage and reverse current density as the smooth as-grown sample, suggestingthat a polished surface can be suitable for device fabrication. However, statistical analysis of several diodes of each sample showed the importance of the substrate quality: a high density of defects both reduces the feasible device area and increases the reverse current density. In forward direction, the hillock-rich sample exhibited a secondary Schottky barrier, which could be fit with a modified thermionic emission (TEM) model employing the Lambert W-function. Both polished and smooth samples showed nearly ideal TEM with ideality factors 1.08 and 1.03, respectively. Compared with the literature, all three diodes exhibit an improved Baliga figure of merit for diamond Schottky diodes with VBD > 2 kV.

Tech Support

Section titled ā€œTech Supportā€

Original Source

Section titled ā€œOriginal Sourceā€

References

Section titled ā€œReferencesā€
  1. 2019 - Diamond Schottky-diode in a non-isolated buck converter

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