Characteristics of hydrogen terminated single crystalline diamond logic inverter
At a Glance
Section titled âAt a Glanceâ| Metadata | Details |
|---|---|
| Publication Date | 2022-01-01 |
| Journal | Acta Physica Sinica |
| Authors | Yufei Xing, Zeyang Ren, Jinfeng Zhang, Kai Su, Senchuan Ding |
| Institutions | Wuhu Institute of Technology, Xidian University |
| Citations | 6 |
| Analysis | Full AI Review Included |
Executive Summary
Section titled âExecutive SummaryâThis research successfully demonstrates a functional logic inverter based on a hydrogen-terminated (H-diamond) Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET), validating diamondâs potential for high-performance digital circuits.
- Device Architecture: A depletion-mode H-diamond MOSFET was fabricated using 15 nm thick Al2O3 (deposited via ALD at 300 °C) as the gate dielectric and passivation layer, crucial for stabilizing the two-dimensional hole gas (2DHG).
- High Current Density: The 4 ”m gate length device achieved a maximum saturated drain current density of 113.4 mA/mm (at VGS = -6 V).
- Excellent Switching Performance: The MOSFET exhibited an ultra-high On/Off ratio of 109 and a low Subthreshold Swing (SS) of 117 mV/dec.
- Inverter Functionality: The MOSFET was integrated with on-chip load resistors (RD, ranging from 16.7 kΩ to 136.4 kΩ) to form a logic inverter circuit.
- High Gain Achieved: The inverter successfully demonstrated voltage inversion characteristics with a maximum voltage gain of 10, confirming its suitability for digital applications.
- Technological Significance: This work establishes a robust fabrication process for diamond logic components, paving the way for integrated circuits operating in extreme environments.
Technical Specifications
Section titled âTechnical Specificationsâ| Parameter | Value | Unit | Context |
|---|---|---|---|
| Semiconductor Material | Single Crystalline Diamond | N/A | H-terminated (100) surface |
| Gate Dielectric | Al2O3 | N/A | Deposited via ALD at 300 °C |
| Dielectric Thickness | 15 | nm | Gate oxide layer |
| Gate Length (LG) | 4 | ”m | MOSFET dimension |
| Gate Width (W) | 50 | ”m | MOSFET dimension |
| Max Saturated Drain Current (IDS,max) | 113.4 | mA/mm | Measured at VGS = -6 V |
| On/Off Ratio | 109 | N/A | Logarithmic transfer characteristic |
| Subthreshold Swing (SS) | 117 | mV/dec | Key switching efficiency metric |
| Threshold Voltage (VTH) | 5.2 | V | Depletion mode operation |
| On-Resistance (Ron) | 83.68 | Ω·mm | Calculated at VGS = -6 V |
| Supply Voltage (VDD) | 10 | V | Inverter operation voltage |
| Max Inverter Voltage Gain | 10 | N/A | Measured with RD = 136.4 kΩ |
| Load Resistor Range (RD) | 16.7 to 136.4 | kΩ | Three different on-chip resistors tested |
Key Methodologies
Section titled âKey MethodologiesâThe device fabrication involved a combination of chemical cleaning, plasma processing, and thin-film deposition techniques:
- Substrate Preparation:
- Substrate: (100) single-crystal diamond (8.0 mm x 8.0 mm x 0.5 mm).
- Cleaning: 30 min in hot HNO3/H2SO4 (250 °C) to remove contaminants, followed by standard solvent cleaning.
- Hydrogen Termination (2DHG Formation):
- Method: Microwave Plasma Chemical Vapor Deposition (MPCVD).
- Temperature: 800 °C.
- Time: 30 min.
- Gas Flow: H2 (500 sccm), CH4 (1 sccm).
- Power/Pressure: 2 kW, 100 mbar (100 Pa).
- Note: Exposure to air post-termination forms the 2DHG.
- Ohmic Contact and Resistor Fabrication:
- Deposition: 100 nm Gold (Au) via electron beam evaporation.
- Function: Forms ohmic source/drain contacts and the on-chip load resistors (RD).
- Device Isolation:
- Process: Contact photolithography followed by wet etching (KI/I2 solution) to define active areas.
- Isolation: Low-power oxygen plasma etching to create device isolation trenches.
- Gate Dielectric Deposition:
- Method: Atomic Layer Deposition (ALD).
- Material: Al2O3 (15 nm thickness).
- Temperature: 300 °C.
- Oxidant: H2O.
- Gate Metal Deposition:
- Material: 100 nm Aluminum (Al) via electron beam evaporation.
- Final Step: Metal lift-off to complete the MOSFET structure.
- Inverter Assembly: The MOSFET drain was connected to the on-chip load resistor (RD), which was connected to the VDD supply (10 V).
Commercial Applications
Section titled âCommercial ApplicationsâThe development of stable, high-performance diamond logic inverters is critical for advancing electronics in fields requiring extreme operational capabilities.
| Application Area | Key Benefit of Diamond Technology | Related Products/Systems |
|---|---|---|
| Extreme Environment Computing | High thermal stability (up to 500 °C) and radiation hardness. | Digital control units for nuclear reactors, aerospace systems, and deep-well drilling equipment. |
| High-Power Switching Systems | Ultra-wide bandgap (5.5 eV) and high breakdown voltage (2 kV reported previously). | Gate drivers and control logic integrated alongside diamond power devices (MOSFETs, diodes) in power converters and inverters. |
| High-Frequency RF Systems | High carrier mobility (up to 365 cm2/(V·s) reported) supports high cutoff frequencies. | Logic and control circuits for 5G/6G base stations, radar, and satellite communication systems operating in the millimeter-wave range. |
| Integrated Circuits (ICs) | Enables the transition from discrete diamond power devices to complex, fully integrated digital logic chips. | Monolithic integration of power and control logic on a single diamond substrate, reducing parasitic losses. |
View Original Abstract
Diamond has a wide band gap, high carrier mobility, and high thermal conductivity, thereby possessing great potential applications in high power, and high temperature electronics devices, and also inhigh temperature logic circuit. In this work, we fabricate a hydrogen terminated diamond metal-oxide-semiconductor field effect transistor (MOSFET) by using the atomic layer deposition grown Al<sub>2</sub>O<sub>3</sub> as a gate dielectric and passivation layer. The device has a gate length and width of 4 Όm and 50 Όm, respectively. The device delivers a maximum output current of about 113.4 mA/mm at <i>V</i><sub>GS</sub> of -6 V and an ultra-high on/off ratio of 10<sup>9</sup>. In addition, we fabricate three resistors, respectively, with an interelectrode distance of 20, 80 and 160 Όm, corresponding to the resistance value of 16.7, 69.5 and 136.4 kΩ, respectively. The logic inverter is realized by combining the MOSFET with the load resistance, and the characteristics of the logic inverter are demonstrated successfully, which indicates that the diamond MOSFET has great potential applications in future logic circuits.