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Recent Progress of Diamond Semiconductor Devices

MetadataDetails
Publication Date2022-06-04
JournalJournal of the Japan Society for Precision Engineering
AuthorsMakoto KASU, Seong-Woo KIM
AnalysisFull AI Review Included

This research details significant progress in fabricating large-area, high-quality diamond semiconductor wafers and subsequent high-performance power devices, overcoming the size limitations of conventional diamond substrates.

  • Wafer Size Achievement: Successfully demonstrated the growth of 2-inch diameter heteroepitaxial diamond wafers, a critical step toward commercial viability, using Microwave Plasma CVD (MPCVD).
  • Strain Management: Developed two methods for strain relief: (1) Microneedle-assisted lift-off, enabling self-separation of thick diamond films (500-600 ”m) from the Ir/Sapphire substrate; and (2) Step-Flow Growth on tilted Sapphire substrates.
  • Material Quality: Step-Flow Growth on 7° tilted Sapphire yielded the highest quality heteroepitaxial diamond reported globally, achieving a narrow XRC FWHM of 98.35 arcsec (004 reflection).
  • Low Dislocation Density: The threading dislocation density was measured at 1.4 x 107 cm-2, confirming the superior crystal quality for heteroepitaxial growth.
  • Power Device Performance: Fabricated Diamond Field-Effect Transistors (FETs) utilizing NO2 p-type doping on the (001) layer, achieving a maximum drain current (IDS,max) of 288 mA/mm.
  • World-Record Efficiency: The FET demonstrated a world-best Baliga Figure of Merit (BFOM) of 344.7 MW/cm2 and a high breakdown voltage (VBR) up to -2608 V (with passivation).
ParameterValueUnitContext
Band Gap (EG)5.47eVDiamond
Breakdown Field (EBR)>10MV/cmDiamond
Thermal Conductivity (λ)22W/cmKDiamond
Electron Mobility (”e)~4500cm2/VsDiamond
Hole Mobility (”h)~3800cm2/VsDiamond
Wafer Diameter Achieved2inchHeteroepitaxial Diamond
Substrate Tilt Angle (Optimal)7°Step-Flow Growth
Threading Dislocation Density (TDD)1.4 x 107cm-2Heteroepitaxial Diamond (001)
XRC FWHM (004 reflection)98.35arcsec7° tilted substrate
XRC FWHM (311 reflection)175.3arcsec7° tilted substrate
Curvature (Bowing) [1100] direction99.64cm7° tilted self-standing wafer
Curvature (Bowing) [0001] direction260.21cm7° tilted self-standing wafer
Maximum Drain Current (IDS,max)288mA/mmDiamond FET (LG=1.5 ”m)
Breakdown Voltage (VBR)-2608VDiamond FET (with passivation)
Baliga Figure of Merit (BFOM)344.7MW/cm2Diamond FET (World-best)
High Frequency Power Density (Reported)2.1W/mmAt 1 GHz

The fabrication process relies on heteroepitaxial growth using Microwave Plasma CVD (MPCVD) on Ir-buffered Sapphire substrates.

  1. Substrate Selection: Sapphire (a-Al2O3) (1120) orientation was chosen due to its availability in large diameters (up to 8 inches) and its thermal expansion coefficient being closer to diamond than MgO or YSZ, minimizing cracking.
  2. Buffer Layer Deposition: An Ir buffer layer was deposited onto the Sapphire substrate via sputtering. The epitaxial relationship established is Diamond (001)[110] // Ir (001)[110] // Sapphire (1120)[0001].
  3. Nucleation: Bias-Enhanced Nucleation (BEN) was performed, where the substrate was negatively biased to accelerate positively ionized methyl (CH3) groups into the Ir surface, promoting diamond nucleation.
  4. Growth Method 1: Microneedle-Assisted Lift-off (Strain Relief):
    • A thin Ni film was deposited and patterned (2 ”m diameter openings, 10 ”m pitch).
    • Exposure to H2 gas at ~1000 °C etched the diamond layer beneath the Ni openings, forming 50 ”m tall microneedles.
    • A thick diamond layer (800-1000 ”m) was grown over the structure.
    • Thermal contraction upon cooling caused the film to fracture at the microneedle layer, enabling self-separation (lift-off) of the 500-600 ”m thick self-standing diamond wafer.
  5. Growth Method 2: Step-Flow Growth (2-inch Wafer):
    • The microneedle process was eliminated.
    • Sapphire substrates were intentionally tilted (misoriented) 0° to 7° from the (1120) plane.
    • Growth on the 7° tilted substrate maximized crystal quality by allowing residual stress to escape along the tilt direction, enabling crack-free, large-area (2-inch) growth.
  6. Device Fabrication (FET):
    • The (001) heteroepitaxial diamond film was used as the channel layer.
    • A p-type hole channel was formed via surface treatment using NO2 doping.
    • Source and Drain electrodes were formed using Au/Ni, and the Gate electrode used Al.
    • Al2O3 was used as the passivation layer.

The successful development of large-area, high-quality heteroepitaxial diamond wafers and high-performance FETs targets the next generation of power and high-frequency electronics.

  • High-Power Conversion Systems: Diamond’s exceptional thermal conductivity (22 W/cmK) and high breakdown field (>10 MV/cm) make it superior to SiC and GaN for high-voltage, high-current switching applications (e.g., electric vehicles, smart grids, industrial motor drives).
  • High-Frequency RF Power Amplifiers: The high carrier mobility and high saturation velocity support applications requiring high power output at high frequencies (e.g., 1 GHz and 120 GHz), such as advanced radar, satellite communications, and 5G/6G mobile base stations.
  • Large-Scale Semiconductor Manufacturing: The achievement of 2-inch wafer size using the scalable step-flow growth method is crucial for transitioning diamond devices from laboratory research to industrial mass production.
  • Extreme Environment Electronics: The material’s robustness makes it suitable for electronics requiring operation under high temperatures or harsh radiation environments where silicon-based devices fail.