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Design optimization of the gallium nitride high electron mobility transistor with graphene and boron nitride heat-spreading elements

MetadataDetails
Publication Date2023-01-01
JournalФизика и техника полупроводников
AuthorsV. S. Volcheck, Lovshenko I. Yu., V. R. Stempitsky
InstitutionsBelarusian State University of Informatics and Radioelectronics
AnalysisFull AI Review Included

This study details the design optimization of a normally-off Gallium Nitride (GaN) High Electron Mobility Transistor (HEMT) augmented with advanced heat-spreading elements.

  • Core Problem: Mitigation of the severe self-heating effect in GaN HEMTs, which degrades electrical performance and long-term reliability.
  • Solution Architecture: A GaN HEMT structure incorporating localized heat-spreading elements made of graphene and cubic boron nitride (β-BN), coupled with a pyrolytic graphite heat sink.
  • Methodology: Numerical simulation utilizing a two-step optimization procedure: Plackett-Burman screening followed by a full two-level factorial experiment.
  • Key Achievement: Design optimization resulted in an 11.35% increase in output power (Pout), raising the performance from 3.26 W to 3.63 W at a drain-source voltage (VDS) of 15 V.
  • Critical Factors: The most influential geometric parameters were identified as the distance from the source to the gate head (X2), the thickness of the p-AlGaN layer (Y5), and the thickness of the spacer (Y7).
  • Thermal Modeling Insight: Accurate simulation required the use of temperature-dependent thermal conductivity models; ignoring this dependence led to significant errors, underestimating power degradation by up to 28.60% (on 6H-SiC substrates).
  • Unexpected Finding: The dimensions of the graphene and β-BN heat-spreading layers were not among the most critical factors influencing the final electrical output power, suggesting that their presence, rather than precise sizing within the tested range, provided the primary thermal benefit.
ParameterValueUnitContext
Initial Output Power (Pout)3.26WDefault geometric parameters (VDS = 15 V)
Optimized Output Power (Pout)3.63WOptimal geometric parameters (VDS = 15 V)
Pout Improvement11.35%Result of design optimization
Gate-Source Voltage (VGS)6VOperating condition for Pout measurements
Drain-Source Voltage (VDS)15VOperating condition for Pout measurements
Optimized Source-Gate Distance (X2)1.71µmInitial default value was 1.9 µm
Optimized p-AlGaN Thickness (Y5)0.018µmInitial default value was 0.02 µm
Optimized Spacer Thickness (Y7)0.0022µmInitial default value was 0.002 µm
p-AlGaN Acceptor Concentration5.3 x 1018cm-3Used to achieve normally-off operation
Substrate Thickness100µmSapphire material
Heat Sink Thickness20µmPyrolytic graphite material
Thermal Conductivity (β-BN)8.368W/(cm·K)At 300 K (Temperature dependence coefficient τ = -0.972)
Thermal Conductivity (Graphite)19.342W/(cm·K)At 300 K (Temperature dependence coefficient τ = -1.125)
Thermal Conductivity (Graphene)20W/(cm·K)Assumed for film of ten or more atomic layers
Max Temperature Decrease (β-BN effect)28.8KAchieved by increasing β-BN thickness (Y3) from 0.02 µm to 0.18 µm

The design optimization was conducted entirely through numerical simulation, focusing on coupling electrical and thermal models accurately.

  1. Fundamental Modeling: The device behavior was governed by a coupled set of partial differential equations: the Poisson equation (electrostatics), carrier continuity equations (transport, generation, recombination), and the lattice heat flow equation (thermal transport).
  2. Self-Heating Model: The thermodynamically rigorous model of lattice heating was employed. Heat generation (H) was simplified to ohmic heating, H = (Jn + Jp)E.
  3. Temperature-Dependent Thermal Conductivity: To ensure accuracy, thermal conductivity (κ) for most materials (GaN, AlN, SiC, etc.) was modeled as a function of temperature, κ(T) = κ(300K) * (T/300)τ. This was critical, as simulations showed up to 28.60% Pout loss if temperature dependence was ignored.
  4. Screening Experiment (Plackett-Burman Design): An economical two-level screening experiment was performed on 18 geometric factors (X1…X10, Y1…Y8). Levels were set at ±10% deviation from initial values. This identified the three most critical parameters (X2, Y5, Y7) influencing Pout.
  5. Optimization Experiment (Full Factorial Design): A full two-level factorial experiment was executed using the three critical factors (X2, Y5, Y7) to systematically explore the design space and yield the optimal combination of parameters that maximized Pout.
  6. Thermal Boundary Conditions: Fixed temperature (300 K) boundary conditions were applied to the bottom surface of the sapphire substrate and the top surface of the pyrolytic graphite heat sink, assuming an infinite heat transfer coefficient at these interfaces.

This research directly supports the development of next-generation power devices, particularly those requiring high efficiency and thermal stability.

  • High Power Conversion Systems: Enabling smaller, more efficient switch-mode power supplies, AC adapters, and industrial variable-frequency drives by minimizing conduction and switching losses.
  • High-Voltage DC Transmission: Providing reliable, high-efficiency transistors for large-scale power transmission infrastructure.
  • Automotive and Electric Vehicles (EVs): Improving the performance and reliability of power electronics (inverters, chargers) in EVs, where thermal management and power density are critical constraints.
  • RF and Telecommunications: Deploying thermally stable GaN HEMTs in high-frequency applications such as 5G/6G base stations, radar systems, and satellite communications, where high power density leads to extreme localized heating.
  • Advanced Thermal Management: Utilizing localized deposition techniques for 2D materials (graphene, β-BN) to create highly effective, integrated heat-spreading layers directly within the semiconductor stack, moving thermal solutions from the package level to the device level.
View Original Abstract

The self-heating effect has long been a persistent issue for high electron mobility transistors based on gallium nitride due to their inherently poor heat dissipation capability. Although a wide variety of thermal management solutions has to date been proposed, the problem of the extremely non-uniform heat dissipation at the micrometer scale is still challenging. It has recently been demonstrated, however, that the performance of gallium nitride high electron mobility transistors can be substantially improved by the introduction of various heat-spreading elements based on graphene, boron nitride or diamond. In this paper, using numerical simulation, we carried out a design optimization procedure for a normally-off gallium nitride high electron mobility transistor containing both graphene and cubic boron nitride layers. First, a screening experiment based on a very economical Plackett-Burman design was performed in order to find the most critical geometric parameters that influence the dc characteristics. After that, a full two-level factorial experiment consisting of three factors was implemented and an optimized parameter set was yielded. By applying this set, the output power was increased by 11.35%. The combination of the most significant parameters does not include any factors related to the heat-spreading layers. Keywords: gallium nitride, high electron mobility transistor, optimization, Plackett-Burman design, screening experiment, self-heating.