Transient Thermal and Electrical Co-Optimization of BEOL Top-Gated ALD In2O3 FETs Toward Monolithic 3-D Integration
At a Glance
Section titled “At a Glance”| Metadata | Details |
|---|---|
| Publication Date | 2023-01-16 |
| Journal | IEEE Transactions on Electron Devices |
| Authors | Pai-Ying Liao, Dongqi Zheng, Sami Alajlouni, Zhuocheng Zhang, Mengwei Si |
| Institutions | United States Naval Research Laboratory, Purdue University West Lafayette |
| Citations | 15 |
Abstract
Section titled “Abstract”In this work, the transient thermal and electrical characteristics of top-gated (TG), ultrathin, atomic-layer-deposited (ALD), back-end-of-line (BEOL) compatible indium oxide (In2O3) transistors on various thermally conductive substrates are co-optimized by visualization of the self-heating effect (SHE) utilizing an ultrafast high-resolution (HR) thermo-reflectance (TR) imaging system and overcome the thermal challenges through substrate thermal management and short-pulse measurement. At the steady-state, the temperature increase ( <inline-formula xmlns:mml=“http://www.w3.org/1998/Math/MathML” xmlns:xlink=“http://www.w3.org/1999/xlink”> <tex-math notation=“LaTeX”>$\Delta {T}$ </tex-math></inline-formula> ) of the devices on highly resistive silicon (HR Si) and diamond substrates are roughly 6 and 13 times lower than that on a SiO2/Si substrate, due to the much higher thermal conductivities ( <inline-formula xmlns:mml=“http://www.w3.org/1998/Math/MathML” xmlns:xlink=“http://www.w3.org/1999/xlink”> <tex-math notation=“LaTeX”>$\kappa $ </tex-math></inline-formula> ) of HR Si and diamond. Consequently, the ultrahigh drain current ( <inline-formula xmlns:mml=“http://www.w3.org/1998/Math/MathML” xmlns:xlink=“http://www.w3.org/1999/xlink”> <tex-math notation=“LaTeX”>${I}{D}$ </tex-math></inline-formula> ) of 3.7 mA/ <inline-formula xmlns:mml=“http://www.w3.org/1998/Math/MathML” xmlns:xlink=“http://www.w3.org/1999/xlink”> <tex-math notation=“LaTeX”>$\mu \text{m}$ </tex-math></inline-formula> at drain voltage ( <inline-formula xmlns:mml=“http://www.w3.org/1998/Math/MathML” xmlns:xlink=“http://www.w3.org/1999/xlink”> <tex-math notation=“LaTeX”>${V}{\text {DS}}$ </tex-math></inline-formula> ) of 1.4 V with direct current (dc) measurement is achieved with TG ALD In2O3 FETs on a diamond substrate. Furthermore, transient thermal study shows that it takes roughly 350 and 300 ns for the devices to heat-up and cool-down to the steady-states, being independent of the substrate. The extracted thermal time constants of heat-up ( <inline-formula xmlns:mml=“http://www.w3.org/1998/Math/MathML” xmlns:xlink=“http://www.w3.org/1999/xlink”> <tex-math notation=“LaTeX”>$\tau _{h}$ </tex-math></inline-formula> ) and cool-down ( <inline-formula xmlns:mml=“http://www.w3.org/1998/Math/MathML” xmlns:xlink=“http://www.w3.org/1999/xlink”> <tex-math notation=“LaTeX”>$\tau {c}$ </tex-math></inline-formula> ) processes are 137 and 109 ns, respectively. By employing electrical short-pulse measurement with a pulsewidth ( <inline-formula xmlns:mml=“http://www.w3.org/1998/Math/MathML” xmlns:xlink=“http://www.w3.org/1999/xlink”> <tex-math notation=“LaTeX”>${t}{\text {pulse}}$ </tex-math></inline-formula> ) shorter than <inline-formula xmlns:mml=“http://www.w3.org/1998/Math/MathML” xmlns:xlink=“http://www.w3.org/1999/xlink”> <tex-math notation=“LaTeX”>$\tau {h}$ </tex-math></inline-formula> , the SHE can be significantly reduced. Accordingly, a higher <inline-formula xmlns:mml=“http://www.w3.org/1998/Math/MathML” xmlns:xlink=“http://www.w3.org/1999/xlink”> <tex-math notation=“LaTeX”>${I}{D}$ </tex-math></inline-formula> of 4.3 mA/ <inline-formula xmlns:mml=“http://www.w3.org/1998/Math/MathML” xmlns:xlink=“http://www.w3.org/1999/xlink”> <tex-math notation=“LaTeX”>$\mu \text{m}$ </tex-math></inline-formula> is realized with a 1.9-nm-thick In2O3 FET on HR Si substrate after co-optimization. Besides, to integrate BEOL-compatible ALD In2O3 transistors on the front-end-of-line (FEOL) devices with the maintenance of the satisfactory heat dissipation capability, a FEOL-interlayer-BEOL structure is proposed where the interlayer not only electrically isolates the FEOL and BEOL devices but also serves as a thermally conductive layer to alleviate the SHE.