Research on the Mechanical Failure Risk Points of Ti/Cu/Ti/Au Metallization Layer

At a Glance

Metadata	Details
Publication Date	2023-11-23
Journal	Crystals
Authors	Mingrui Zhao, Xiaodong Jian, Si Chen, Minghui Chen, Gang Wang
Institutions	Ministry of Industry and Information Technology, Xiamen University of Technology
Analysis	Full AI Review Included

Executive Summary

This research investigates the mechanical reliability and failure mechanisms of a Ti/Cu/Ti/Au metallization layer used for bonding diamond heat spreaders to silicon (Si) substrates, a critical technology for advanced thermal management in high-power microelectronic devices.

Robust Bonding Achieved: A stable, defect-free bond between diamond and Si was achieved using electron beam evaporation and room-temperature, low-pressure bonding with a Ti/Cu/Ti/Au (5/300/5/50 nm) stack.
High Shear Strength: The maximum shear bonding strength reached 48.51 MPa at a bonding pressure of 6 MPa.
Substrate Failure Mode: Mechanical testing confirmed that the bonding layer strength surpassed the strength of the base material, resulting in brittle fracture occurring primarily within the bulk silicon substrate.
Lattice Distortion Identified: X-ray Diffraction (XRD) analysis revealed significant lattice expansion distortion and stress accumulation within the thin Ti layers, positioning the Ti layer as the lowest strength component at the surface.
Weakest Link Confirmation: Thermo-mechanical fatigue simulations (ANSYS/nCode DesignLife) identified the Ti layer as the primary mechanical failure risk point, predicting a minimum fatigue life of 21,340 cycles.
Failure Mechanism: Fatigue damage in the Ti layer is caused by compressive forces exerted by the thick Cu layer, which has a significantly higher Coefficient of Thermal Expansion (CTE), leading to stress concentration at the Cu/Ti interface.

Technical Specifications

Parameter	Value	Unit	Context
Metallization Stack Composition	Ti/Cu/Ti/Au	nm	Layer thicknesses (5/300/5/50)
Max Bonding Pressure Tested	6	MPa	Room-temperature bonding
Max Bonding Strength Achieved	48.51	MPa	Measured at 6 MPa pressure
Si-Ti/Cu/Ti/Au Surface Roughness	2.17	nm	Measured by AFM
Ti (200) Diffraction Peak Shift	0.3	°	Shift towards lower angles (lattice distortion)
Max Thermal Stress (Simulated)	101.23	MPa	Located at the Cu/Ti interface
Minimum Fatigue Life (Simulated)	21,340	cycles	Failure point: Ti layer
Cu Thermal Conductivity	400	W/m·K	Material property
Diamond Thermal Conductivity	2000	W/m·K	Material property
Cu Thermal Expansion Coefficient (CTE)	1.6 x 10^-5	K^-1	High CTE layer causing compression
Si Thermal Expansion Coefficient (CTE)	2.5 x 10^-6	K^-1	Substrate reference
Ti Crystal Structure	HCP	-	Hexagonal Close-Packed
Au Crystal Structure	FCC	-	Face-Centered Cubic

Key Methodologies

Substrate Cleaning: Diamond (1 x 1 x 0.3 mm³) and Silicon (10 x 10 x 0.3 mm³) wafers were ultrasonically cleaned using isopropyl alcohol, acetone, and ethanol, followed by rinsing with ultra-pure water.
Thin-Film Deposition: Metal modification layers (Ti/Cu/Ti/Au: 5/300/5/50 nm) were deposited onto both Si and diamond surfaces using electron beam evaporation (Oxford Vapour Station 4).
Deposition Environment: The process was conducted at 25 °C under a nitrogen atmosphere at 10^-5 Pa.
Room-Temperature Bonding: Samples were bonded using a Fineplacer Lambda-controlled chip bonder at low pressures (1, 3, 5, and 6 MPa).
Structural and Defect Analysis: Surface morphology and roughness were assessed via Optical Microscopy (OM) and Atomic Force Microscopy (AFM). Internal structure and defect absence were confirmed using X-ray inspection and Scanning Acoustic Microscopy (SAM).
Crystallographic Analysis: X-ray Diffraction (XRD) was performed using Cu Kα radiation to analyze crystal structure and lattice distortion, particularly in the Ti layer.
Mechanical Testing: Bonding strength was measured using a tensile shear force tester (MFM1200). Fracture surfaces were analyzed using Scanning Electron Microscopy (SEM) and Energy-Dispersive Spectroscopy (EDS) to determine failure location and mechanism.
Thermo-Mechanical Fatigue Simulation: Finite element analysis (ANSYS Mechanical) coupled with fatigue analysis software (nCode DesignLife) was used to model thermal stress distribution and predict fatigue life under alternating thermal and shear loads (Hybrid Load Provider method).

Commercial Applications

The technology focuses on creating highly reliable, high-thermal-conductivity interfaces, primarily targeting advanced thermal management in electronics.

High-Power Density Microelectronics: Essential for next-generation chips where increasing power density leads to severe internal temperature rise.
Diamond Heat Spreaders: Facilitating the stable integration of diamond, the preferred material for advanced packaging thermal management, into semiconductor devices.
GaN HEMT Devices: Critical for thermal dissipation in Gallium Nitride High Electron Mobility Transistors used in high-frequency and high-power applications.
Advanced Packaging: Applicable to die-to-wafer and chip-to-substrate bonding requiring robust, low-temperature processes.
Reliability Engineering: The methodology provides a framework for identifying and mitigating mechanical failure risks (specifically lattice distortion and CTE mismatch fatigue) in multi-layer metallization stacks.

View Original Abstract

The cohesive performance and durability of the bonding layer with semiconductor substrates are of paramount importance for realizing the high thermal conductivity capabilities of diamond. Utilizing electron beam evaporation and the room-temperature, low-pressure bonding process, robust adhesion between diamonds and silicon substrates has been achieved through the application of the metal modification layer comprised of Ti/Cu/Ti/Au (5/300/5/50 nm). Characterization with optical microscopy and atomic force microscopy reveals the uniformity and absence of defects on the surface of the deposited layer. Observations through X-ray and scanning acoustic microscopy indicate no discernible bonding defects. Scanning electron microscopy observation and energy-dispersive spectroscopy analysis of the fracture surface show distinct fracture features on the silicon substrate surface, indicating that the bonding strength of the Ti/Cu/Ti/Au metallization layer surpasses that of the base material. Furthermore, the fracture surface exhibits the presence of Cu and trace amounts of Ti, suggesting that the fracture also occurs at the interface between Ti and Cu. Characterization of the metal modification layer using X-ray diffraction reveals significant lattice distortion in the Ti layer, leading to noticeable stress accumulation within the crystalline structure. Thermal-mechanical fatigue simulations of the Ti/Cu/Ti/Au metal modification layer indicate that, owing to the difference in the coefficient of thermal expansion, the stress exerted by the Cu layer on the Ti layer results in the accumulation of fatigue damage within the Ti layer, ultimately leading to a reduction in its strength and eventual failure.

Tech Support

Original Source

DOI: https://doi.org/10.3390/cryst13121625

References

2023 - Chip-level thermal management in GaN HEMT: Critical review on recent patents and inventions [Crossref]
2020 - Application progress of diamond heat dissipation substrate in GaN-based power devices
2023 - Heterogeneous integration of high-quality diamond on aluminum nitride with low and high seeding density [Crossref]
2020 - Surface activated bonding of SiC/diamond for thermal management of high-output power GaN HEMTs [Crossref]
2021 - Diamond Schottky barrier diodes fabricated on sapphire-based freestanding heteroepitaxial diamond substrate [Crossref]
2021 - Two-inch high-quality (001) diamond heteroepitaxial growth on sapphire (1120) misoriented substrate by step-flow mode [Crossref]
2020 - Integration of GaN and diamond using epitaxial lateral overgrowth [Crossref]
2023 - Van der waals epitaxial GaN thin films on polycrystalline diamond substrate