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High‐Temperature and High‐Electron Mobility Metal‐Oxide‐Semiconductor Field‐Effect Transistors Based on N‐Type Diamond

MetadataDetails
Publication Date2024-01-19
JournalAdvanced Science
AuthorsMeiyong Liao, Huanying Sun, Satoshi Koizumi
InstitutionsNational Institute for Materials Science, Beijing Academy of Quantum Information Sciences
Citations45
AnalysisFull AI Review Included

This research successfully addresses the long-standing challenge of developing n-channel diamond MOSFETs, a critical step toward realizing all-diamond Complementary Metal-Oxide-Semiconductor (CMOS) integrated circuits for extreme environments.

  • Core Achievement: Demonstrated functional n-channel MOSFETs based on electronic-grade phosphorus-doped (111) diamond operating stably up to 573 K (300 °C).
  • Record Mobility: Achieved a field-effect electron mobility of approximately 150 cm2 V-1 s-1 at 573 K, the highest reported for any n-channel MOSFET based on wide-bandgap semiconductors at this temperature.
  • Material Quality: Fabricated high-quality n-type diamond epilayers using step-flow nucleation mode, resulting in atomically flat terraces (Ra ≈0.1 nm) and low stress (Raman FWHM 1.75 cm-1).
  • Doping Control: Achieved low donor concentration (≈1017 cm-3) in the channel layer without observing hopping conductivity, crucial for device performance. Hydrogen content was controlled at the noise level (1017 cm-3).
  • Harsh Environment Capability: The excellent high-temperature performance enables the development of energy-efficient, high-reliability CMOS circuits for high-power, integrated spintronics, and extreme sensing applications.
  • Switching Speed: Demonstrated a switching speed (rise/decay time) of less than 5 µs at 573 K, suitable for mixed-signal circuits like radiation detectors and MEMS sensors.
ParameterValueUnitContext
Max Field-Effect Mobility (µeff)~150cm2 V-1 s-1Calculated at 573 K (300 °C) in saturation region.
Max Operating Temperature573KStable electrical characterization temperature.
Max Saturated Drain Current (Id,sat)105µA mm-1At 573 K (Vds = 20 V, Vgs = 10 V).
On-Resistance (Ron)160kΩ mmAt 573 K (Vgs = 10 V).
Threshold Voltage (Vth)~-25VExtracted via Id0.5 method; stable with temperature.
Max Transconductance (gm)4µS mm-1At 573 K.
Switching Speed (tr, td)< 5µsAt 573 K (Vds = 15 V, Vgs amplitude 10 V).
Channel Doping (n-) Concentration (ND)~1017cm-3Phosphorus concentration in the 600 nm channel layer.
Contact Doping (n+) Concentration~1020cm-3Phosphorus concentration in the 100 nm contact layer.
Hall Mobility (n- layer)212cm2 V-1 s-1Measured at 573 K in the lightly doped film.
Thermal Activation Energy (ED)0.57eVPhosphorus donor activation energy.
Gate Oxide Material/ThicknessAl2O3 / 30nmDeposited via ALD at 473 K.
Crystal Quality (Raman FWHM)1.75cm-1Full-width at half maximum of the n- epilayer.
Surface Roughness (Ra)~0.1nmAverage roughness of the atomically flat terrace.

The high-quality n-type diamond epilayer and subsequent MOSFET fabrication relied on precise control over growth and processing steps:

  1. Substrate Preparation: Used type-Ib (111) High-Pressure High-Temperature (HPHT) diamond substrates with a 3° misorientation to facilitate step-flow growth.
  2. Epitaxial Growth (MPCVD):
    • n- Channel Layer: Grown directly on the substrate using Microwave Plasma Chemical Vapor Deposition (MPCVD) at 920 °C, 100 Torr, and 500 W power. The growth followed the step-flow nucleation mode, ensuring high crystal quality and atomically flat surfaces.
    • n+ Contact Layer: A 100 nm heavily phosphorus-doped layer was deposited using a homemade MPCVD reactor to maximize phosphorus incorporation (P/C ratio 10,000 ppm).
  3. Ohmic Contact Formation:
    • Source (S) and Drain (D) contacts were formed on the n+ layer using electron beam deposition of Ti (50 nm)/Pt (10 nm)/Au (60 nm).
    • Contacts were annealed at 773 K for 30 minutes in a high vacuum chamber.
  4. Mesa Etching: The top n+ layer between S and D electrodes was etched using oxygen plasma Reactive Ion Etching (RIE) until the lightly doped n- channel layer was reached.
  5. Gate Oxide Deposition: A 30 nm Al2O3 gate oxide was deposited via Atomic Layer Deposition (ALD) at 473 K.
  6. Gate Metal Deposition: The gate electrode consisted of Ti (10 nm)/Au (60 nm).
  7. Electrical Characterization: Performed in a vacuum chamber (10-3 Pa) using a shielded probe station, with temperatures ramped up to 573 K until stable currents were achieved.

The successful demonstration of high-mobility, high-temperature n-channel diamond MOSFETs opens pathways for all-diamond CMOS technology, targeting applications where silicon and conventional wide-bandgap semiconductors fail.

  • High-Power Electronics: Development of energy-efficient, high-reliability CMOS integrated circuits for power management and conversion, leveraging diamond’s high breakdown voltage and thermal conductivity.
  • Extreme Environment Sensing: Fabrication of sensors (e.g., MEMS, chemical sensors) capable of operating stably under high temperatures (>573 K) and intense radiation fields, such as in aerospace, nuclear, or geothermal industries.
  • Integrated Spintronics: Monolithic integration of diamond electronics with Nitrogen-Vacancy (NV) centers. N-type diamond stabilizes the negatively charged NV state, improving sensitivity and enabling scalable quantum sensing protocols requiring dedicated electronic control.
  • Mixed-Signal and RF Circuits: The demonstrated switching speed (< 5 µs) is sufficient for peripheral circuitry in radiation detectors and high-frequency systems, enabling monolithic diamond chips combining sensing and processing.
  • High-Frequency Devices: While current series resistance limits operation to the kilohertz range at RT, the significant resistance reduction at 573 K suggests potential for megahertz operation upon optimization of device geometry (reducing drift region and gate length).
View Original Abstract

Abstract Diamond holds the highest figure‐of‐merits among all the known semiconductors for next‐generation electronic devices far beyond the performance of conventional semiconductor silicon. To realize diamond integrated circuits, both n‐ and p‐channel conductivity are required for the development of diamond complementary metal‐oxide‐semiconductor (CMOS) devices, as those established for semiconductor silicon. However, diamond CMOS has never been achieved due to the challenge in n‐type channel MOS field‐effect transistors (MOSFETs). Here, electronic‐grade phosphorus‐doped n‐type diamond epilayer with an atomically flat surface based on step‐flow nucleation mode is fabricated. Consequently, n‐channel diamond MOSFETs are demonstrated. The n‐type diamond MOSFETs exhibit a high field‐effect mobility around 150 cm 2 V −1 s −1 at 573 K, which is the highest among all the n‐channel MOSFETs based on wide‐bandgap semiconductors. This work enables the development of energy‐efficient and high‐reliability CMOS integrated circuits for high‐power electronics, integrated spintronics, and extreme sensors under harsh environments.