Improvement of the Thermal Performance of the GaN-on-Si Microwave High-Electron-Mobility Transistors by Introducing a GaN-on-Insulator Structure

At a Glance

Metadata	Details
Publication Date	2024-12-21
Journal	Micromachines
Authors	Lu Hao, Zhihong Liu, Hanghai Du, Shenglei Zhao, Han Wang
Institutions	University of Hong Kong, Xidian University
Analysis	Full AI Review Included

Executive Summary

This research proposes and analyzes a GaN-on-Insulator (GNOI) structure to drastically improve the thermal performance of conventional GaN-on-Si High-Electron-Mobility Transistors (HEMTs) for microwave applications.

Core Value Proposition: The GNOI structure eliminates the low-thermal-conductivity III-nitride transition layer (0.1 W/cmK) inherent in conventional GaN-on-Si HEMTs, replacing it with a high-thermal-conductivity dielectric bonding layer.
Methodology: Electrothermal TCAD simulation (Silvaco ATLAS) was used to compare conventional GaN-on-Si HEMTs against GNOI structures utilizing SiO₂, SiC, AlN, and Diamond bonding dielectrics.
Thermal Resistance Reduction: The thermal resistance (R_th) of the device was reduced by up to 40% (from 31 °C/(W/mm) to 19 °C/(W/mm)) using a 2 µm Diamond bonding layer.
Power Handling Improvement: The maximum allowable heat dissipation power density (P_150°C) was increased from 5.7 W/mm (conventional) to 8.0 W/mm (2 µm Diamond).
Electrical Performance Gain: DC performance was significantly improved, with the peak transconductance (g_mmax) increasing by up to 22% for the Diamond GNOI device at high drain bias (V_DS = 20 V).
Feasibility: The GNOI approach leverages established wafer bonding technology and is compatible with large-wafer Si CMOS foundries, enabling potential monolithic integration.

Technical Specifications

Parameter	Value	Unit	Context
Gate Length (L_G)	0.25	µm	Simulated RF HEMT structure
Source-Drain Distance (L_SD)	3.0	µm	Simulated RF HEMT structure
Si Substrate Thickness	100	µm	Thinned substrate thickness
Conventional Thermal Resistance (R_th)	31	°C/(W/mm)	Conventional GaN-on-Si HEMT
Best GNOI Thermal Resistance (R_th)	19	°C/(W/mm)	GNOI with 2 µm Diamond bonding
R_th Reduction (Max)	40	%	Diamond GNOI vs. Conventional
Conventional Max Power Density (P_150°C)	5.7	W/mm	At 150 °C peak temperature limit
Best GNOI Max Power Density (P_150°C)	8.0	W/mm	GNOI with 2 µm Diamond bonding
Peak Transconductance (g_mmax) Improvement	22	%	GNOI (2 µm Diamond) vs. Conventional (at V_DS = 20 V)
Si Substrate Thermal Conductivity (k_RT)	1.48	W/cmK	Room temperature value
Transition Layer Thermal Conductivity	0.1	W/cmK	AlN/GaN super-lattice (SL) transition layer
Diamond Bonding Layer Thermal Conductivity (k_RT)	3.7	W/cmK	2.0 µm thickness
SiC Bonding Layer Thermal Conductivity (k_RT)	0.64	W/cmK	0.3 µm to 2.0 µm thickness
AlN Bonding Layer Thermal Conductivity (k_RT)	1.3	W/cmK	2.0 µm thickness

Key Methodologies

The thermal performance analysis was conducted using three-dimensional electrothermal simulation, focusing on structural modification and material selection.

Simulation Platform: Electrothermal simulations were carried out using the device simulator ATLAS from Silvaco TCAD 2019.
Structural Modification (GNOI): The conventional GaN-on-Si structure, including the low-conductivity AlN/GaN super-lattice (SL) transition layer, was replaced. The GaN barrier, channel, and buffer layers were modeled as transferred onto a new Si substrate.
Bonding Layer Implementation: Wafer bonding technology was simulated using high-thermal-conductivity dielectric layers (SiO₂, SiC, AlN, and Diamond) between the GaN buffer and the 100 µm Si substrate.
Thickness Variation: Bonding dielectric thicknesses were varied from 0.2 µm up to 2.0 µm to analyze the impact on heat dissipation.
Thermal Modeling: All material thermal conductivities (k) were modeled as temperature-dependent using the relationship: k(T) = k_RT(300/(273 + T))^a.
Boundary Conditions: The bottom surface of the Si substrate was set to a fixed reference temperature (T_R) of 300 K. Thermal boundary conductivity between GaN and the dielectrics/Si was included in the model.
Calibration: Polarization coefficients and channel mobility were adjusted to match simulated DC output characteristics at low drain biases with existing experimental data.

Commercial Applications

The GNOI structure offers a path to realizing the full potential of GaN-on-Si HEMTs, particularly in applications demanding high power density and thermal stability.

High-Power Microwave Amplifiers: Essential for next-generation radar, electronic warfare, and satellite communication systems requiring high output power (e.g., >10 W/mm).
5G/6G Communication Infrastructure: Improving the reliability and efficiency of power amplifiers in communication base stations by mitigating thermal runaway and self-heating effects.
Monolithic Microwave Integrated Circuits (MMICs): The GNOI-on-Si approach maintains compatibility with large-wafer Si processing, enabling the monolithic integration of high-performance GaN RF circuits with standard Si CMOS digital circuits.
Automotive and Industrial RF: Applications requiring robust, high-temperature operation, such as high-frequency sensors and industrial heating systems.
Thermal Management Solutions: The successful use of deposited SiC, AlN, and especially poly-crystalline/nano-crystalline diamond as high-k bonding layers provides a blueprint for advanced thermal management in other semiconductor devices.

View Original Abstract

GaN-on-Si high-electron-mobility transistors have emerged as the next generation of high-powered and cost-effective microwave devices; however, the limited thermal conductivity of the Si substrate prevents the realization of their potential. In this paper, a GaN-on-insulator (GNOI) structure is proposed to enhance the heat dissipation ability of a GaN-on-Si HEMT. Electrothermal simulation was carried out to analyze the thermal performance of the GNOI-on-Si HEMTs with different insulator dielectrics, including SiO2, SiC, AlN, and diamond. The thermal resistance of the HEMTs was found to be able to be obviously reduced and the DC performance of the device can be obviously improved by removing the low-thermal-conductivity III-nitride transition layer and forming a GNOI-on-Si structure with SiC, AlN, or diamond as the bonding insulator dielectrics.

Tech Support

Original Source

DOI: https://doi.org/10.3390/mi15121525

References

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